--
-- VHDL Architecture Fietscomputer_lib.gen_multiplier.combi
--
-- Created:
--          by - jcmooije.UNKNOWN (dtp7985)
--          at - 16:49:17  7-07-2010
--
-- using Mentor Graphics HDL Designer(TM) 2007.1 (Build 19)
--
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;
USE ieee.std_logic_unsigned.all;

ENTITY fc_Dist_Const IS

  PORT( 
  wheel_size  : OUT     STD_LOGIC_VECTOR(63 DOWNTO 0);
  conv_time   : OUT     STD_LOGIC
  );
  
  
END fc_Dist_Const ;

ARCHITECTURE combi OF fc_Dist_Const IS
CONSTANT r_dist : integer := 7752312;

BEGIN
  conv_time <= '0';
  wheel_size <= CONV_STD_LOGIC_VECTOR(r_dist, 64);
END ARCHITECTURE combi;
  
  
  
  
  